aiT WCET Analyzer for TriCore statically computes tight upper bounds for the worst-case execution time of tasks in safety-critical applications written or generated in C or C++ and compiled to run on TriCore processors, including AURIX.
Key benefits
- The static analysis guarantees that the computed WCET bounds are valid for all possible inputs, all possible cache and pipeline states, and each task execution under any circumstances. No testing or measuring required.
- aiT directly analyzes binary executables, exactly as they are executed in the final system. This requires no modification of your system’s operational behavior or performance, and no modification of your toolchain.
- The WCET bounds computed by aiT are extremely tight and thus reflect the actual performance of your system. Deadline adherence is ensured without wasting hardware resources.
- aiT lets you easily save and compare the analysis results before and after making changes to your system, such that their effect on the worst-case timing can be understood immediately and completely.
- Using aiT is essential in meeting current safety standards such as ISO 26262 and DO-178B/C, where static WCET analysis is part of the architectural safety requirements.
Supported processor derivates
- AUDO family (core 1.3.x):
TC1197, TC1767, TC1782, TC1784, TC1796, TC1797 - AURIX family (core 1.6P/1.6E/1.6.1):
TC23x, TC26x, TC27x, TC29x,
NEW: TC212, TC222 - AURIX family 2nd GEN (core 1.6.2P):
TC32x, TC33x, TC35x, TC36x, TC37x, TC38x, TC39x - 3rd GEN AURIX 499 (core 1.8)
Various other derivates are covered by TimeWeaver that combines static analysis with real-time instruction-level tracing. It supports all TriCore ED boards able to emit execution traces containing MCDS trace messages. This hybrid approach is compliant with CAST-32A and EASA AMC 20-193.
For other derivates not listed above, write to info@absint.com.
Timing profiling from day one
In order to provide WCET guarantees, aiT formally models the exact processor derivate your application is executed on.
If you haven’t picked a specific derivate yet — or if the final pick is not yours to make —, you can nonetheless benefit from static analysis to develop your application in a timing-conscious way, from day one.
For this, you can use the fully-integrated TimingProfiler. It will help you identify application parts that will cause unsatisfactory execution times regardless of the specific TriCore processor you end up using.
Once the hardware has been decided on, you can then easily switch from TimingProfiler to aiT, within the same GUI, keeping all your settings and annotations, and without having to install anything.
Also available for TriCore
Supported compilers
- TASKING C/C++ compiler
- GNU C/C++ compiler (GCC)
- HighTec GNU C/C++ compiler
- Diab C/C++ compiler (WindRiver)
- GHS C/C++ optimizing compiler (Green Hills)
System requirements
- Windows: 64-bit Windows 10 or 11
- Linux: 64-bit CentOS/RHEL 7 or compatible
- 4 GB of RAM (16 GB recommended)
- 4 GB of disk space
- The Linux version requires the
libxcb-*family of libraries to be installed - Support for macOS High Sierra 10.13 or newer is possible on request for a surcharge
Recent improvements
- Improved handling of peripheral memory with zero-cycle wait states
- Improved handling of DLMU read accesses that hit the store buffer
- Improved and optimized Qualification Support Kits
- Three additional qualification test cases
- All QSKs now come with the QSLCD report included
- See the complete release notes
- Support for version 1.8 of the TriCore instruction set
- Improved handling of mixed calling conventions
- Improved handling of writes to registers with subregisters
- Eleven additional qualification test cases
- See the complete release notes
- Improved automatic decoding of computed control-flow transitions
- Improved handling of core-local DLMU memory accesses
and of fast call/return operations for 2nd-GEN AURIX - Improved switch-table decoding for Tasking
- Ten additional qualification test cases
- See the complete release notes
- Improved automatic decoding of syscall and trap control-flow targets
- Improved switch-table decoding for Clang
- One additional qualification test case
- See the complete release notes
- WCET analysis for AURIX 499 (AA-step)
- Reworked instruction type classifications
- Improved handling of
TRAPINV, division by zero, and CSA chain initialization in OS code - Improved switch-table decoding for GCC
- Optimized Qualification Support Kits
- See the complete release notes
- WCET analysis for TC212 and TC222
- Even faster cache and pipeline analysis
- Improved handling of calls to external routines for 1st- and 2nd-GEN AURIX
- Improved automatic switch-table decoding
- Higher precision for the
madd.uinstruction - Board-specific Qualification Support Kits for TC379, TC389, and TC399
- See the complete release notes
Integration with ASCET
aiT for TriCore supports tight integration with ASCET, the state-of-the-art model-based ECU software development environment from ETAS. You can start aiT directly from the ASCET project editor menu to perform a WCET analysis of the automatically generated ECU code. Free trial versions are available for TriCore microcontrollers with the ERCOSEK or RTA-OSEK operating systems.
Qualification support
Your usage of aiT can be qualified according to ISO 26262, DO-178B/C, and other safety standards. We offer Qualification Support Kits that help you simplify and automate your qualification process:
- Board-specific base QSKs
- Optional compiler-specific add-on QSKs for
- HighTec GCC 3.4.5.1
- Tasking VX 6.2r2p3
- Tasking VX 6.3r1p2
Compiler-specific QSKs for other compilers can be developed on request.
Free trial
You can try aiT for free, on your own applications, for a period of 30 days. The free license covers:
- One supported TriCore derivate of your choice
- Any number of supported compilers
- More than one physical machine if needed, but no VMs
- Windows, Linux, or both
- The ValueAnalyzer add-on, and also StackAnalyzer if you wish
- Free online training and tech support
