Improved analysis messages
Running a CFG reconstruction after a WCET analysis leaves previous messages intact
The message window has been improved in a number of ways:
- message verbosity is now easily configurable;
- errors and warnings are now highlighted in a more intuitive way;
- results of analyses performed earlier are retained;
- the context menu now allows jumping from an address to the corresponding point in the control flow graph.
In addition, analysis messages now include the time and memory consumption of each analysis step.
New Stack Contribution view
Stack contributions of functions are now listed in a separate table.
Auto completion for analysis start points
Added auto completion for analysis start points in Files view.
MAP-file entry
a³ for M68020, x86, and H8 now allow specifying a MAP file in the Files view.
60x bus pipelining
a³ for MPC603e now supports enabling/disabling 60x bus pipelining in the processor configuration tab.
- Bus pipelining enabled (option set to “On”): address and data phases on the 60x bus can be pipelined.
- Bus pipelining disabled: the assertion of the “Address Acknowledge” marking
the end of an address phase is delayed until after the completion of the corresponding data
phase.
- If the option is set to “Off (AACK and TA in same cycle)”, the signal is generated in the same cycle as the last “Transfer Acknowledge”.
- If the option is set to “Off (AACK one cycle after TA)”, the signal is generated exactly one cycle after the last “Transfer Acknowledge”.