a³ release 19.04

New targets and compilers

• StackAnalyzer, ValueAnalyzer and TimingProfiler now available for dsPIC33E.
• StackAnalyzer, ValueAnalyzer and TimingProfiler now available for MCS251.
• All tools for SPARC architectures now support LLVM/Clang-based compilers.

New Qualification Support Kits

• Generic QSK for StackAnalyzer for dsPIC.
• Generic QSK for StackAnalyzer for TriCore.
• Compiler-specific QSK for StackAnalyzer for ARM with keil-5.02.0.28.
• Compiler-specific QSK for aiT for ARM with keil-5.02.0.28.

Improved license management

• The license server now supports specifying passwords for individual users to disallow anonymous connections.
• Improved stability of AbsInt License Manager connections.
• Better socket handling and thus improved resource consumption.
• The license content can now be viewed from within the License dialog.
• Improved error messages for invalid or expired licenses.
• New command-line option -D <dir> for specifying the directory for the ALM settings (alm.ini) and the license file (license.dat). This command is only applied to the ALM instance started with it, and is not persistent.

TargetLink integration

• Fixed an issue with finding the target file.
• Removed an invalid instance of the command line option -g.
• Enabled the “Unified cache” option for MPC5554.

Linux support

With this release the minimum system requirements for Linux go up from version 6 to version 7 of CentOS/RHEL.

Full project search

A new global view lets you search through all project content at once, including AIS files, report files, the Message view, and result graphs.

Improved batch modes

• Stricter consistency checks in the -b batch mode.
• Improved stability of the -B batch mode.

Visualization & results

• Improved graph search for paged addresses.
• Improved source-code visualisation.
• “Show source” is now generally more accurate, as well as improved in particular for blocks that only have line information for some of their instructions.
• Improved visualization of C++ member functions in graph view.
• XML reports now include entries for analyses that fail to start.

Improved DWARF handling

• Improved inverted search filter for DWARF debug info.
• The text editor now always offers lookup of DWARF info for addresses via context menu.
• New option to globally disable the extraction of DWARF debug information.

ValueAnalyzer

ValueAnalyzer now allows to start an analysis for all functions or code labels at once, and then explore the results interactively.

Other improvements

• More stable loading of workspaces.
• Improved dependency handling of analyses.
• XTC 2.7 with TimeWeaver support.
• The “Create analysis” dialog now allows creating several analyses at once.
• Improved warnings about deprecated/removed project entries when loading a project.

AIS2

• For code snippets excluded from analysis, multiple preserves specifications are now combined.
• target returns: always; and target obeys calling conventions; are now allowed for calls with delay slots.
• The infeasible annotation now works for instructions in delay slots.

• Results of other analyses can now be queried from within AIS files after adding a dependency in the GUI.

  For example, given the TimeWeaver analysis max_timeweaver that computes the WCET contribution of the routine max, you can reference the result in another analysis using:

  routine "max" {
      not analyzed;
      obeys calling conventions: true;
      takes: def(":result_max_timeweaver") cycles;
  }

Control-flow, stack and value analysis

• The value analysis now reports the names of read/written function pointers:

  instruction 0x40002368 reads from [0x40005fc0]:4 ('reg_err_handler')
  value is [0x40002424] (function pointer: 'user_err_handler')

  If unresolved control flow remains, the value analysis will try to list all possible function pointers found in allocated sections:

  Function pointers found in allocated sections:
  
  0x003f44a1 'handle_progress_msg'
  
  * occurrences in section '.econst'
    0x003f8ed4 ('msg_handler_tbl[1].handler')

• 
  Improved precision of:
  • stack analysis for routines with different maximum local stack consumption per calling context
  • stack-relative memory information
  • the relational domain for modulo operations, self-assignment and identity relations
• Improved reporting of:
  • infeasible start points for value analysis
  • area annotations that partially overlap with mirrored memory regions
  • broken DWARF debug line information
  • negative stack usage annotations (the analyzer issues a warning and assumes a stack usage of zero)
• Improved error message for empty input executables.
• Improved annotation hints for unresolved computed calls.
• Improved heuristics to automatically resolve computed calls via symbol table.
• All symbols that are mangled C++ names (Itanium ABI variant) like _ZN6FooBarC1Ev are now demangled to be more readable, like FooBar::FooBar().
• Better detection of mismatching decoding settings, e.g. trying to use a 32-bit decoder for an 64-bit binary.
• Optimized iterative decoding annotation output. Routine scoped annotations are only output if required due to code duplication in the binary.
• Improved handling of DWARF debug information of C code.
• Added annotation location to output about issues with enter with/exit with annotations.
• Improved handling of memory mapped registers.
• Improved stack-relative memory addressing.
• Improved resolving of routine symbols with C/C++ function signature.
• When resolving virtual member function calls, the resolver looks for matching classes in outer namespaces in case no appropriate class is found in the user-specified namespace.
• Improved handling of complex area definitions using DWARF debug information.
• Improved DWARF array heuristics. Multiple arrays can now be handled for one access.
• ARM:
  • Improved switch table decoding for Keil and TI.
  • Improved decoding of __aeabi_uldivmod.
• C16x: Improved stability of the decoder.
• FR81: Improve compatibility of the FeOMF reader.
• PowerPC:
  • Support for SPE2 division
  • Improved switch table decoding for GHS and GCC
• SPARC:
  • Improved support for alternate address spaces
  • User and supervisor (instruction) address space are handled like normal memory accesses, assuming 1:1 mapping (address space identifiers: 0x8, 0x9, 0xa, 0xb). For other address spaces warnings/errors are issued to indicate potential analysis issues.
• TriCore:
  • Improved handling of CSA load/store operations.
  • Improved handling of the CSA stack.
  • Improved switch table decoding for HighTec GCC.
  • Uniform mnemonics for indirect load/store instructions.
• V850:
  • Improved handling of SYSCALL.
  • Improved resolving of indirect computed calls.
  • EIRET, FERET, and RETI are no longer treated as end of program.
• x86: Improved switch table decoding for GCC.

Cache and pipeline analysis

• e300/PPC: Improved handling of the eieio instruction to prevent the analyzer from stalling.
• LEON3: improved pipeline model.
• TriCore: improved handling of imprecise memory accesses for TimingProfiler.

C++ Call Target Analyzer

• Support for virtual operators.
• The analyzer now always falls back to shipped C++/C standard headers.
• Include paths can now be added in the GUI.

Infineon traces

• Improved handling of Infineon MCDS traces.
• 
  Improved error handling.
• The interactive tracing via Infineon DAS can now be done remotely.
• The tracing via DAS is attempted three times in case of connection problems or similar issues.

PowerPC BHM traces

• Improved handling of interrupts.
• Generalized trace parser.

Other trace formats

• Better handling of iSYSTEM winIDEA CSV export traces.
• Improved thread-switch handling for PPC Lauterbach ASCII traces.

Reporting

• Export to the XML report file of all trace snippet runtimes encountered.
• Now reporting whether a trace snippet has stopped before reaching a valid end.
• Reporting potential entry points in case no trace snippet could be extracted.

Other improvements

• Support for partial trace snippets, as well as a new option to only allow complete traces during analysis.
• The start-point selection for TimeWeaver analyses now offers a list of potential entry points encountered in the trace file(s).
• Improved thread-switch detection.
• Improved trace-iterative decoding.
• You can now specify the addresses of interrupt service routines, enabling the trace converter to correctly identify interrupts and avoid them from being resolved as potential control-flow targets:

  attribute "interrupts": address(match("interrupt_vector_[0-9]+"));

New packages

• Generic QSK for StackAnalyzer for dsPIC.
• Generic QSK for StackAnalyzer for TriCore.
• Compiler-specific QSK for StackAnalyzer for ARM with keil-5.02.0.28.
• Compiler-specific QSK for aiT for ARM with keil-5.02.0.28.

TOR/VTP improvements

• Added the sub words REQ and QK to the legend for the construction of requirement/test case identifier names.
• Only the configuration recommendations relevant to the particular core feature are now shown in the TOR.
• Avoiding usage of the abbreviation “QSK” without explanation.
• Added a section listing the covered D0-330 objectives.
• Changed a literature reference in generic, stack, and ARM-thumb QSKs to point to the instruction-set architecture documentation instead of the Cortex-M4 hardware manual.

Other improvements

• Enhanced check for Windows’ max path limitation.
• Revised QSK package file names and improved installation path consistency checks.

New test cases