Contact
Curriculum vitæ
Daniel Kästner, born in 1973, studied computer science and business economics at the Saarland University. In 1997, he completed his master’s thesis about code generation methods for digital signal processors, for which he received the 1999 VDI Saar Award.
From 1997 to 2000, he received a doctoral scholarship in the Graduate Research Program “Efficiency and Complexity of Algorithms and Computer Systems” funded by the German Research Foundation. In 2000, he completed his Ph.D. thesis, summa cum laude, about code optimization for embedded processors, for which he received the SaarLB Science Award in 2002.
Dr. Kästner is a co-founder of AbsInt. From 2000 to 2003, he was a research associate at Saarland University and Senior Software Engineer with AbsInt. Since 2003, he is CTO at AbsInt.
2007 and 2012 he was a guest lecturer at Saarland University with advanced courses on the development of safety-critical embedded systems.
Dr. Kästner is a member of the ISO 26262 and IEC 61508 working groups on Software Safety, and a member of the MISRA C and MISRA SQM working groups.
He was a program commitee member of numerous international conferences, including:
- SCOPES 2004, 2007, 2009–2011
- FMICS 2011
- TAPAS 2010
- WCET 2010
- DATE 2006
- RTAS 2006
- CTCES 2004
Dr. Kästner is also a frequent speaker at the many tradeshows, conferences, and other events that we attend every year all around the world.
Recent talks
-
“Timing verification of AUTOSAR-based fail-operational systems”
Safetronic, November 2024, Stuttgart -
“C threads and atomics — the concurrency rules of MISRA C:2023”
Embedded World North America, October 2024, Austin, TX -
“Sound non-interference analysis for C and C++”
SafeComp, September 2024, Florence -
“Can you trust your compiler? — Principles and benefits of formal compiler verification”
VDA Automotive SYS Conference, July 2024, Berlin -
“Determining WCET bounds for multi-core processors”
Aerospace Tech Week Europe, April 2024, Munich
Research interests
- Functional safety
- Cybersecurity
- Program analysis
- Run-time error analysis
- Compiler design
- Compiler verification
- Abstract interpretation
- WCET analysis
- Microprocessor modeling
- Task scheduling for real-time systems
- Code generation and optimization
In these fields, Dr. Kästner has authored or co-authored over 70 peer-reviewed publications.
Selected publications
- Multi-Core WCET Analysis Using Non-Intrusive Continuous Observation. D. Kästner, G. Gebhard, M. Pister, S. Wegener, C. Ferdinand, A. Schulz, M. Sachenbacher, M. Leucker, A. Weiss. In ERTS 2024: Embedded Real Time Software and Systems, 12th European Congress, Toulouse, June 2024.
- Satisfying Timing Requirements for Safety-Critical Real-Time Software. D. Kästner, C. Hümbert, G. Gebhard, M. Pister, S. Wegener, C. Ferdinand. Embedded World Congress 2024, Nuremberg.
- Automatic Sound Static Analysis for Integration Verification of AUTOSAR Software. D. Kästner, C. Mallon, L. Mauborgne, S. Schank, S. Wilhelm, C. Ferdinand. SAE Technical Paper 2023-01-0591, SAE World Congress 2023, Detroit, April 2023.
- Static Data and Control Coupling Analysis. D. Kästner, L. Mauborgne, S. Wilhelm, C. Mallon, C. Ferdinand. In ERTS 2022: Embedded Real Time Software and Systems, 11th European Congress, Toulouse, June 2022.
- Obtaining DO-178C Certification Credits by Static Program Analysis. D. Kästner, M. Pister, C. Ferdinand. In ERTS 2022: Embedded Real Time Software and Systems, 11th European Congress, Toulouse, June 2022.
- Whole-System Analysis for Memory Protection and Management. F. Bräunling, S. Wegener, D. Kästner, I. Stilkerich. In ERTS 2022: Embedded Real Time Software and Systems, 11th European Congress, Toulouse, June 2022.
- Compositional Fault Propagation Analysis in Embedded Systems Using Abstract Interpretation. C. Bartsch, S. Wilhelm, D. Kästner, D. Stoffel and W. Kunz. IEEE International Test Conference (ITC), October 2021.
- Taming Timing — Combining Static Analysis with Non-Intrusive Tracing to Compute WCET Bounds on Multicore Processors. D. Kästner, C. Hümbert, G. Gebhard, M. Pister, S. Wegener, C. Ferdinand. Embedded World Congress 2021, Virtual Conference.
- Testing Implementation Soundness of a WCET Analysis Tool, R. Wilhelm, M. Pister, G. Gebhard, and D. Kästner. In Jian-Jia Chen, Ed., A Journey of Embedded and Cyber-Physical Systems, Springer Open Access, 2021. ISBN 978-3-030-47487-4 (eBook).
- High-Precision Sound Analysis to Find Safety and Cybersecurity Defects (Best Paper Award). D. Kästner, L. Mauborgne, S. Wilhelm, C. Ferdinand. In ERTS 2020: Embedded Real Time Software and Systems, 10th European Congress, Toulouse, January 2020.
- Detecting Spectre Vulnerabilities by Sound Static Analysis. D. Kästner, L. Mauborgne, C. Ferdinand, H. Theiling. In CYBER 2019: Proceedings of the Fourth International Conference on Cyber-Technologies and Cyber-Systems, Porto, 2019.
- Analyze this! Sound static analysis for integration verification of large-scale automotive software. D. Kästner, B. Schmidt, M. Schlund, L. Mauborgne et al. SAE Technical Paper 2019-01-1246, 2019.
- Obtaining worst-case execution time bounds on modern microprocessors (PDF, 900kB). D. Kästner, M. Pister, S. Wegener, and C. Ferdinand. Embedded World Congress, Nuremberg, 2018.
- CompCert: Practical Experience on Integrating and Qualifying a Formally Verified Optimizing Compiler (PDF, 600kB). D. Kästner, J. Barrho, U. Wünsche, M. Schlickling, B. Schommer et al., in ERTS² 2018 — Embedded Real Time Software and Systems, Toulouse, January 2018. <hal-01643290>.
- Detecting Safety- and Security-Relevant Programming Defects by Sound Static Analysis (Best Paper Award). D. Kästner, L. Mauborgne, C. Ferdinand. In CYBER 2017: Proceedings of the Second International Conference on Cyber-Technologies and Cyber-Systems, Barcelona, 2017. Published by IARIA XPS Press, pp. 26–31, ISSN: 2519-8599, ISBN: 978-1-61208-605-7.
- Benchmarking Static Code Analyzers. J. Herter, D. Kästner, C. Mallon, R. Wilhelm. In SAFECOMP’17: Proceedings of the International Conference on Computer Safety, Reliability and Security (SAFECOMP), Trento, 2017. Springer LNCS tbd, Springer, Heidelberg.
- Finding All Potential Runtime Errors and Data Races in Automotive Software. D. Kästner, A. Miné, L. Mauborgne, X. Rival, J. Feret, P. Cousot, A. Schmidt, H. Hille, S. Wilhelm, C. Ferdinand. SAE Technical Paper 2017-01-0054, SAE World Congress 2017, Detroit, April 2017.
- Closing the Gap — The Formally Verified Optimizing Compiler CompCert. D. Kästner, X. Leroy, S. Blazy, B. Schommer, M. Schmidt, C. Ferdinand. In Proceedings of the 25th Safety-Critical System Symposium SSS 2017, Bristol, UK.
- Applying Abstract Interpretation to Verify EN-50128 Software Safety Requirements. D. Kästner, C. Ferdinand. First International Conference on Reliability, Safety, and Security of Railway Systems — Modelling, Analysis, Verification, and Certification, RSSRail 2016, Paris, France, June 28–30, 2016.
- Proving the Absence of Software-Induced Memory Corruption. D. Kästner, C. Ferdinand. In Mike Parsons and Tom Anderson, editors, Developing Safe Systems. Proceedings of the Twenty-fourth Safety-critical Systems Symposium, pages 383–399, Brighton, UK, February 2016. Safety-Critical Systems Club.
- Taking Static Analysis to the Next Level: Proving the Absence of Run-Time Errors and Data Races with Astrée. A. Miné, L. Mauborgne, X. Rival, J. Feret, P. Cousot, D. Kästner, S. Wilhelm, C. Ferdinand. In ERTS 2016: Embedded Real Time Software and Systems, 8th European Congress, January 2016, Toulouse, France.
- CompCert — A Formally Verified Optimizing Compiler (Best Paper Award). X. Leroy, S. Blazy, D. Kästner, B. Schommer, M. Pister, C. Ferdinand. In ERTS 2016: Embedded Real Time Software and Systems, 8th European Congress, January 2016, Toulouse, France.
- Exploiting Synergies between Static Analysis and Model-Based Testing (Distinguished Paper Award). S. Salvi, D. Kästner, T. Bienmüller, C. Ferdinand. Proceedings of the 11th European Dependable Computing Conference (EDCC’15). IEEE Computer Society Press, September 2015.
- Mastering Resource Usage by Continuous Static Profiling. D. Kästner, G. Gebhard, C. Hümbert, C. Cullmann, C. Ferdinand. Embedded World Congress 2015, Nuremberg.
- Program Analysis on Evolving Software. D. Kästner, J. Pohland. In Matthieu Roy, editor, CARS 2015 — Critical Automotive applications: Robustness & Safety, Paris, France, September 2015.
- Applying Abstract Interpretation to Demonstrate Functional Safety. D. Kästner. In Boulanger, J.-L., editor, Formal Methods Applied to Industrial Complex Systems, ISTE/Wiley, London, UK, 2014.
- True Error or False Alarm? Refining Astree’s Abstract Interpretation Results by EmbeddedTester’s Automatic Model-based Testing. S. Salvi, D. Kästner, T. Bienmüller, C. Ferdinand. Proceedings of the ERCIM/EWICS/ARTEMIS Workshop on Dependable Embedded and Cyber-physical Systems and Systems-of-Systems (DECSoS’14), Florence, 2014. Springer LNCS 8696.
- Proving the Absence of Stack Overflows. D. Kästner, C. Ferdinand. In SAFECOMP’14: Proceedings of the 33rd International Conference on Computer Safety, Reliability and Security (SAFECOMP), Florence, 2014. Springer LNCS 8666.
- Combining Model-based Analysis and Testing. D. Kästner, U. Brockmeyer, M. Pister, S. Nenova, T. Bienmüller, A. Dereani, C. Ferdinand. Embedded Real Time Software and Systems Congress ERTS², Toulouse, 2014.
- Reliability of WCET Analysis. D. Kästner, M. Pister, G. Gebhard, C. Ferdinand. Embedded Real Time Software and Systems Congress ERTS², Toulouse, 2014.
- Model-Driven Code Generation and Analysis. D. Kästner, C. Rustemeier, U. Kiffmeier, D. Fleischer, S. Nenova, R. Heckmann, M. Schlickling, C. Ferdinand. SAE World Congress 2014.
- Confidence in Timing. D. Kästner, M. Pister, G. Gebhard, M. Schlickling, C. Ferdinand. Proceedings of the Safecomp 2013 Workshop: Next Generation of System Assurance Approaches for Safety-Critical Systems (SASSUR), Toulouse, 2013.
- Static Verification of Non-Functional Software Requirements in the ISO 26262. D. Kästner, C. Ferdinand. Automotive — Safety & Security 2012. Sicherheit und Zuverlässigkeit für automobile Informationstechnik. Internationale Tagung der Fachgruppen Ada, ENCRESS und EZQN der Gesellschaft für Informatik, Karlsruhe, November 2012.
- Architecture Exploration and Timing Estimation during Early Design Phases. R. Heckmann, C. Ferdinand, D. Kästner, S. Nenova. International Journal on Software Tools for Technology Transfer (STTT), SpringerLink OnlineFirst, 2012, DOI: 10.1007/s10009-012-0248-8.
- Meeting Real-Time Requirements with Multi-Core Processors. D. Kästner, M. Schlickling, M. Pister, C. Cullmann, G. Gebhard, R. Heckmann, C. Ferdinand. Safecomp 2012 Workshop: Next Generation of System Assurance Approaches for Safety-Critical Systems (SASSUR), Magdeburg, September 2012.
- Safety Standards and WCET Analysis Tools. D. Kästner, C. Ferdinand. Embedded Real Time Software and Systems Congress ERTS², Toulouse, 2012.
- Transferring Stability Proof Obligations from Model Level to Code Level. M. Dierkes, D. Kästner. Embedded Real Time Software and Systems Congress ERTS², Toulouse, 2012.
- Efficient Verification of Non-Functional Safety Properties by Abstract Interpretation: Timing, Stack Consumption, and Absence of Runtime Errors. D. Kästner, C. Ferdinand. Proceedings of the 29th International System Safety Conference ISSC2011, Las Vegas, 2011.
- An Integrated Timing Analysis Methodology for Real-Time Systems. D. Kästner, C. Ferdinand, R. Heckmann, M. Jersak, P. Gliwa. SAE World Congress 2011.
- Using Code Analysis Tools for Software Certification.
D. Kästner, C. Ferdinand. Embedded World Congress 2011, Nürnberg, 2011. - Finding all Runtime Errors in C Code. D. Kästner, S. Wilhelm, S. Nenova, P. Cousot, R. Cousot, J. Feret, L. Mauborgne, A. Miné, X. Rival. Embedded World Congress 2011, Nuremberg, 2011.
- 100% Coverage for Safety-Critical Software — Efficient Testing by Static Analysis. D. Kästner, R. Heckmann, C. Ferdinand. Proceedings of the 29th International Conference on Computer Safety, Reliability and Security (SAFECOMP), Vienna, 2010.
- Astrée: Proving the Absence of Runtime Errors. D. Kästner, S. Wilhelm, S. Nenova, P. Cousot, R. Cousot, J. Feret, L. Mauborgne, A. Miné, X. Rival. Embedded Real Time Software and Systems Congress ERTS², Toulouse, 2010.
- Integration of Code-Level and System-Level Timing Analysis for Early Architecture Exploration and Reliable Timing Verification. C. Ferdinand, R. Heckmann, M. Jersak, D. Kästner, K. Richter. Embedded Real Time Software and Systems Congress ERTS², Toulouse, 2010.
- Architecture Exploration and Timing Estimation During Early Design Phases. C. Ferdinand, R. Heckmann, D. Kästner, S. Nenova. Embedded World Congress, Nuremberg, 2010.
- Nachweis der Abwesenheit von Laufzeitfehlern mit Astrée.
D. Kästner. Design & Elektronik, 2010. - Das Zeitverhalten von Echtzeitsystemen im Griff. P. Gliwa, D. Kästner, M. Jersak. ElektronikPraxis Marktreport Embedded Systeme, February 2010.
- Worst-Case Timing Estimation and Architecture Exploration in Early Design Phases. S. Nenova, D. Kästner. Proceedings of the 9th International Workshop on Worst-Case Execution-Time Analysis, Dublin, 2009.
- Astrée: Nachweis der Abwesenheit von Laufzeitfehlern. D. Kästner, C. Ferdinand, S. Wilhelm, S. Nenova, O. Honcharova, P. Cousot, R. Cousot, J. Feret, L. Mauborgne, A. Miné, X. Rival, E.-J. Sims. Proceedings of the GI workshop “Entwicklung zuverlässiger Software-Systeme”, Vol. 29 of Softwaretechnik-Trends, Regensburg, August 2009.
- Vermeiden von Laufzeitfehlern in eingebetteter Software. D. Kästner. atp Edition Automatisierungstechnische Praxis 10–11/2009, Oldenbourg Industrieverlag.
- Entwicklungsmethodik für zuverlässige, kostenoptimierte Echtzeitsysteme. P. Gliwa, D. Kästner, K. Richter. 1st Elektronik automotive congress, Munich, 2009.
- Timing Predictability of Embedded Systems.
D. Kästner, C. Ferdinand. Embedded World Congress, Nuremberg, 2009.
- Timing Validation of Automotive Software. D. Kästner, R. Wilhelm, R. Heckmann, M. Schlickling, M. Pister, M. Jersak, K. Richter, C. Ferdinand. 3rd International Symposium on Leveraging Applications of Formal Methods, Verification and Validation (ISOLA), Kassandra, Greece, 2008.
- Static Memory and Timing Analysis of Embedded Systems Code. C. Ferdinand, R. Heckmann, and D. Kästner. Proceedings of The IET Conference on Embedded Systems at Embedded Systems Show (ESS) 2006, Birmingham.
- Postpass Software Compaction. D. Kästner. In: Caspar Grote, editor, Kfz-Elektronik: Begleittexte zum Entwicklerforum, 16. Mai 2006, Ludwigsburg. Poing, Design & Elektronik, 2006.
- Mehr Effizienz durch weniger Speicherbedarf.
D. Kästner. D&V Kompendium. Munich, Publish Industry Verlag, 2005. - Generic Software Pipelining at the Assembly Level. M. Pister and D. Kästner. Proceedings of the 9th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2005), ACM International Conference Proceeding Series 136, pp. 50–61. New York, ACM Press, 2005.
- Compilation for Embedded Processors. D. Kästner. European Summer School on Embedded Systems, 2003. MRTC Report no. 119/2004. Mälardalens Högskola. ISSN 1404-3401.
- Automatically Generating Value Analyzers for Assembly Code. N. Fritz, D. Kästner, F. Martin. Workshop on Compilers and Tools for Constrained Embedded Systems (CTCES), San Jose, 2003.
- Reconstructing Control Flow from Predicated Assembly Code. B. Decker, D. Kästner. International Workshop on Software and Compilers for Embedded Systems (SCOPES), 2003.
- TDL: A Hardware Description Language for Retargetable Postpass Optimizations and Analyses. Daniel Kästner. ACM SIGPLAN/SIGSOFT Conference on Generative Programming and Component Engineering (GPCE), 2003.
- Validierung des Zeitverhaltens von kritischer Echtzeit-Software. C. Ferdinand, D. Kästner, F. Martin, M. Langenbach, M. Sicks, S. Wilhelm, N. Fritz, S. Thesing, F. Fontaine, H. Theiling, R. Wilhelm. Workshop: Automotive SW Engineering & Concepts. 33. Jahrestagung der GI, Frankfurt/M. Informatik 2003 — Innovative Informatikanwendungen, Band 1 (ISBN 3-88579-363-6), Lecture Notes in Informatics (LNI), 2003.
- Post-Pass Compaction Techniques. B. de Bus, D. Kästner, D. Chanet, L. van Put, and B. de Sutter. Communications of the ACM, vol. 46, issue 8, pp. 41–46, August 2003.
- Generic Control Flow Reconstruction from Assembly Code. Daniel Kästner, Stephan Wilhelm. Proceedings of the ACM SIGPLAN Joined Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES’02) and Software and Compilers for Embedded Systems (SCOPES’02), Berlin, 2002.
- Compiler Optimizations by ILP-based Approximations.
Daniel Kästner. SIAM Conference on Optimization, Toronto, 2002. - ILP-based Instruction Scheduling for IA-64. Daniel Kästner, Sebastian Winkel. Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Embedded Systems, Utah, 2001.
- ILP-based Approximations for Retargetable Code Optimization. Daniel Kästner. Proceedings of the 5th International Conference on Optimization: Techniques and Applications (ICOTA 2001), Hong Kong, 2001.
- Retargetable Postpass Optimisation by Integer Linear Programming.
Daniel Kästner. PhD Thesis. Verlag Pirrot, Saarbrücken, 2000. ISBN 3-930714-55-8. - PROPAN: A Retargetable System for Postpass Optimisations and Analyses. Daniel Kästner. Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Embedded Systems, Vancouver, CA, June 2000.
- Code Optimization by Integer Linear Programming. Daniel Kästner, Marc Langenbach. Proceedings of the 8th International Conference on Compiler Construction, Amsterdam. LNCS 1575, pages 122–136, Springer, 1999.
- Run-Time Guarantees for Real-Time Systems — The USES Approach. C. Ferdinand, D. Kästner, M. Langenbach, F. Martin, M. Schmidt, J. Schneider, H. Theiling, S. Thesing, and R. Wilhelm. Proceedings of the ATPS99, Paderborn, Germany.
- Cache-Aware Pre-Runtime Scheduling.
Daniel Kästner, Stephan Thesing. Journal of Real-Time Systems, vol. 17, 1999. - Operations Research Methods in Compiler Backends.
D. Kästner, R. Wilhelm. Journal of Mathematical Communications, 1999. - Cache Sensitive Pre-Runtime Scheduling.
D. Kästner, S. Thesing. Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Embedded Systems, Montreal, CA. LNCS 1474, pages 131–145, Springer, 1998. - Integer Linear Programming vs. Graph-Based Methods in Code Generation.
D. Kästner, M. Langenbach. Technical Report A/01/98. Saarland University, 1998. - Instruktionsanordnung und Registerallokation auf der Basis ganzzahliger linearer Programmierung für den digitalen Signalprozessor ADSP-2106x. Daniel Kästner. Master’s Thesis. Saarland University, 1997.