The compression ratio and speed for APZ files has been improved.
Reduced memory consumption of analyses.
This is the last release to officially support Windows 7. Future releases will require at least Windows 10.
qk_ais2_alignment_specification
and qk_setting_assume_aligned_data_accesses
to work with the machine type "Generic ARMv5".qk_setting_instruction_cache_mode
,
qk_setting_data_cache_mode
, and qk_setting_cache_specification
to check for expected cache miss output in XML report files:
qk_ais2_memory_values
and
qk_ais2_area_definitions_simple
to cover the match functor.qk_ais2_conditional_annotation_scopes
to cover cascaded if-then-else statements and the new variant of functor analysisType().qk_ais2_expression_pp_area_operators
to cover the functor 'interval' and usage of the functor 'entries' that evaluates
in value analysis phase.qk_ais2_expression_symbolic
to check for redefinitions.qk_ais2_expression_pp_area_operators
to cover the functor attribute.qk_ais2_alignment_specification
is now being excluded for ARM machine types
that do not support this feature.qk_ais2_context_specification_max_length
and
qk_ais2_context_specification_default_unroll
to cover interval values in mapping annotations.qk_ais2_pre_included_ais_file qk_ais2_attribute_predefined qk_computation_sum | all architectures |
qk_ais2_macro qk_ais2_evalc | all except C16x and C28x |
qk_ais2_preserves_stack | all except C16x, C28x, dsPIC, i386 |
qk_setting_area_properties_cached qk_setting_area_properties_locked qk_setting_area_properties_writeback qk_setting_instruction_cache_mode qk_setting_data_cache_mode qk_setting_area_properties_emif qk_measurement_r5f_ldr_emif_* | ARM (tms570lc4357) |
qk_setting_btv qk_setting_psw_isp | TriCore |
routine "Proc1" { not analyzed; obeys calling conventions; stack usage: 64 bytes; if (attribute("architecture") == "tricore") { stack "csa" usage: 128 bytes; } }The above annotation can be used for multiple architectures such as PPC and TriCore without any additional annotation effort.
attribute("name")
, e.g. attribute("analysis_id")
.macro("<name>", <programpoint>)
to extract
#define information from DWARF debug information.evalC("<expr>")
to evaluate a C constant,
e.g. obtained using the new 'macro' functor:
loop "processData.L1" bound: 0 .. evalC(macro("BUFFER_SIZE"));
analysisType(a)
is now replaced by analysisType() == a
.routine "<name>" instruction -> "<offset>" bytes { ... }
try { ... }
scopes.*
* Assertions about Infeasibility
*
* reachability for routine 'exit_ok'
is not reachable (but expected to => ASSERTION FAILED)
* reachability for routine 'exit_evil'
* in context '0x3e807c->"exit_evil"':
may be reachable (but is expected to be not => ASSERTION PROBABLY FAILED)
routine "ISR2_minmax" instruction -> 0 bytes comment: "Hello World!";
routine "init_task_function" dump: "reg_msg_handlers";is now supported for the entry routine of an analysis.
area ("IOFields"[].match(".+data.+")) volatile;will match all structure members that contain the string "data".
CALLT
/CTRET
.isa-fr81: Warning #3073: In "test.c", line 6:
In routine 'testFunc', at address 0x101364:
In "routine_accesses.ais", line 4, column 26:
The memory access annotation restricts the write access to an area which is outside the computed memory area.
Assuming infeasible path.
computed: [0x00100fd0]
specified: [0x00100ff0]
routine "test" mapping { max length: 5; }
#3153: Overlapping register 'is' has a contradiction between analyzed value [0x1] and restriction to [0x0].
In file foo.c:208, at 0x800017dc (test_function)
In context any-history
#3153: 'enter with' annotation for register 'psw' with value [0x00000400] causes contradictions.
Assuming infeasible path.
In file psw_is_conflict.ais:1:45
In file foo.c:208, at 0x800017dc (test_function)
In context any-history
routine "test" area 0x003fff00 to 0x003fffff { assert readable: false; assert writable: true; }is extended to output the computed access range of the access that violates the given constraints.
c33pipe: Warning #7177: In "do_char_007.c", line 10:
In routine '_main.L1', at address 0x80000d:
In context '..., 0x800000->"_main.L1"[1]':
For loop '_main.L1' the default loop bound of 4 contradicts the analyzed result that the loop cannot be left until round 5 at the earliest.
Annotation proposal:
loop "_main.L1" {
bound: 0 .. <int>;
#mapping default unroll: <int>;
#takes: <int> <unit>; # To address busy-waiting loops
}